This invention relates to pad structures for integrated circuits, and more particularly, to structures that allow patterns of via holes to be used to provide electrical connections between successive integrated circuit metal layers in the vicinity of a pad.
Integrated circuits typically have pads to which electrical connections are made when the circuit is mounted in a package. Leads are wire bonded between appropriate portions of the package and the pads. Signals on an integrated circuit are routed between active circuitry and the pads using patterned metal interconnection layers separated by insulating layers. Some portions of the metal interconnection layers form data lines for routing signals between various active circuit components. Other portions of the metal interconnection layers form lines to carry signals between active circuitry and the pads, which are also formed from the metal interconnection layers.
Metal lines are connected through narrow via holes in the insulating layers that separate metal interconnection layers. Metal can be deposited in these narrow via holes using a technique known as etchback deposition. Metal interconnection layers are also connected when forming conventional pad structures.
To form conventional pad structures, relatively large pad openings are generally formed in the insulating layers that separate metal interconnection layers. As each metal interconnection layer is deposited, it makes an electrical connection with an underlying metal interconnection layer through the pad opening. The pad openings for this type of conventional pad structure are large, which allows such structures to carry relatively high currents between interconnection layers without consuming surface area elsewhere on the integrated circuit. However, the large size of the pad openings creates problems during circuit fabrication. When the large pad openings are exposed to the metal etchback deposition process used to fill via holes, slivers of excess metal are produced along the sidewalls of the pad openings. The metal slivers generate particles, which are highly undesirable during the circuit fabrication process.
It is therefore an object of the present invention to provide integrated circuit pad structures that can be fabricated with minimal particle generation.
It is a further object of the present invention to provide integrated circuit pad structures that allow the electrical connections made between successive metal interconnection layers in the vicinity of a pad to be formed using various patterns of metal-filled via holes.